1. Field of the Invention
The present invention relates to a method of enhancing the adhesion between photoresist layer and a substrate and a bumping process. More particularly, the present invention relates to a method of enhancing the adhesion between photoresist layer and a substrate and a bumping process that utilizes at least two photoresist layers having different viscosity.
2. Description of the Related Art
In this information technology society, the use of multimedia systems is expanding at an ever increasing rate. As a result, integrated circuit manufacturers have produced countless new digital electronic devices capable of networking and catering for a variety of personal tastes. To meet the demands of most customers, the electronic device must have a high processing speed, many powerful functions, highly integrated circuits, a miniaturized body having very little weight and a low selling price. Following this trend, the circuit density inside many integrated circuit packages are increased to produce high package density packages such as the ball grid array (BGA) packages, the chip scale packages (CSP), the flip-chip (F/C) packages and the multi-chip modules (MCM). The quality of a package is often assessed according to its integrated circuit package density, which is the number of pins per unit area. For a high-density integrated circuit package, a shorter average wiring length is often translated into a higher signaling speed. Since bump connection is able to shorten transmission length considerably, its application is widespread in high-density packages.
FIGS. 1A through 1F are schematic cross-sectional views showing the steps in a conventional bumping process. As shown in FIG. 1A, a wafer 100 having a plurality of bonding pads 102 thereon is provided. A passivation layer 106 is formed over an active surface of the wafer 100. The passivation layer 106 exposes the bonding pads 102. The wafer further has an under-bump metallurgy (UBM) layer 104 disposed over the exposed active surface and a portion of the passivation layer 106 around the bonding pad 102.
As shown in FIG. 1B, a photoresist layer 108 is formed over the wafer 100. Thereafter, as shown in FIG. 1C, a photolithography and development process is performed to form a plurality of openings 108a in the photoresist layer 108 above the bonding pads 102. Through the openings 108a, a portion of the under-bump metallurgy (UBM) layer 104 is exposed.
As shown in FIG. 1D, a solder material is deposited to fill the openings 108a by stencil printing process so that a plurality of solder posts 110 is formed over the UBM layer 104. As shown in FIG. 1E, the photoresist layer 108 is removed to expose the solder posts 110.
As shown in FIG. 1F, a reflow process is then performed to heat the solder posts 110 into a partially melted state so that a spherical-like solder posts 110 is formed due to the cohesion thereof. Then, the spherical-like solder posts 110 are cooled and form a plurality of spherical bumps 110a. 
In the aforementioned bumping process, the top surface of the passivation layer is typically rough so that the photoresist layer can not adhere entirely on the top surface of the passivation layer. Thus, gaps are often formed between the photoresist layer and the passivation layer. However, with the ever-increasing density in the integrated circuit package, the pitch between neighboring bonding pads is getting smaller and smaller. When the solder material are filled into the openings to form the solder posts, some of the gaps may also be filled by the solder material so that two neighboring bonding pads will electrically bridge through the solder material.
FIG. 1G is a schematic cross-sectional view showing a portion of the region between neighboring bumps fabricated according to a conventional bumping process. As shown in FIG. 1G, the aforementioned steps of performing a photolithography and development process to form openings in the photoresist layer 108 and filling the openings by a stencil printing process to form solder posts 110 are similarly applied. However, due to the gaps 112 formed between the passivation layer 106 and the photoresist layer 108, some of the solder material may be filled into the gaps 112 so that the bonding pads 102 on each side of the gaps 112 will electrically bridge through the solder material.